 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| SiRFstarIIe/LP Chip Set A Low Power GPS Chip Set for Consumer Products SiRF Chips and Software ARCHITECTURE HIGHLIGHTS Industry Leading GPS Performance Builds on high performance SiRFstarIIe Architecture supports user task integration Signal acquisition using 1920 time/frequency search channels SBAS (WAAS and EGNOS), and DGPS support Multipath-mitigation hardware Cold Start under 45 seconds FAMILY HIGHLIGHTS GSP2e/LP - Flexible Digital IC Microprocessor throughput measured at up to 40 MIPS 8k of cache for improved throughput On-chip 1Mb SRAM for GPS navigation Integrated high-precision Real-Time Clock Extensive GPS receiver peripherals 2 UARTS, high speed serial bus, battery backed SRAM, >40 GPIO, Low Power Under 175 mW at full power TricklePowerTM mode reduces power to under 60 mW Adaptive TricklePower intelligently switches between full and TricklePower. Push to fix reduces power by as much as 98% GRF2i/LP - Low Power RFIC On-chip VCO and reference oscillator Integrated LNA Uses less than 30 mA's of current Simplified digital interface Maximizes GPS Position Availability SingleSatTM updates in reduced visibility Superior urban canyon performance FoliageLockTM for weak signal tracking GSW2 Modular Software Easily integrated into existing systems 95% CPU throughput available for user tasks Tunable performance in all applications Robust development environment Compatible with SiRFloc and SiRFXtrac SiRFstarII ARCHITECTURE SiRFstarIIe/LP architecture sets the standard for high volume GPS performance. The SiRFstarIIe/LP still uses 1,920 corrolators and 12 channels to provide fast acquisition and reaquisition times, while keeping peak current to under 65 mA. TricklePower extends battery life even further by reducing average current to under 20mA. Now superior performance features like SingleSat, SnapLock, and FoliageLock are available using less power. The chipset consists of the GSP2e/LP, a highly integrated digital chip with 40 MIPS of processing power and the GRF2i/LP, a lower power version of the GRF2i integrated front end. The GSW2 software completes the package providing flexible system architechture for standalone GPS based products. The SiRFstarIIe/LP also supports SiRF's high sensitivity stand alone software, SiRFXtrac and mult-mode software,SiRFLoc. When low power, low cost, and high performance matter SiRFstarIIe/LP is the best solution. 1 Evaluate SiRFstarIIe/LP BLOCK DIAGRAM RTC XTAL Serial Data Power Battery AGC REF XTAL RF Filter (Optional) LNA GPS Antenna Input 2 Develop Build w w w sh a 3 at .d ee u. t4 om c Serial Data 2-Bit Timemark Reset Controller GSP2e/LP GRF2i/LP GPS CLKS DATA BUS ADDRESS BUS ROM RAM (Optional) www..com TECHNICAL SPECIFICATIONS Position Accuracy Autonomous WAAS Beacon DGPS <10m <5m <2.5m Receiver Tracking Channels Max. Update Rate Sensitivity Max. Altitude Max. Velocity Protocol Support APPLICATIONS L1, CA code 12 10Hz -172dBW <60,000 ft <1,000 knots NMEA, SiRF Binary The SiRFstarIIe/LP is a flexible low-power GPS chip set that integrates into a postage-stamp sized receiver. It works well where GPS is the main function such as handheld GPS, marine GPS, or personal locators or where the design calls for stand-alone GPS functionality such as GPS integrated into the batteryback of a cell phone or in an add on compact flash card. The excess processing power can be used for user tasks such as running an LCD or controlling an Automatic Vehicle Location module. Acquisition Reacquisition Time SnapStart Hot Start Warm Start Cold Start 100msec <3sec <8sec <38sec <45sec CHIP ORDERING CONFIGURATION RF CHIP PACKAGES Chip Name Chip PN Package LQFP, 48 pin (LPCC), 32 pin GRF2I/LP-0210 SiRFstarII GRF2i/LP SiRFstarII GRF2i/LP (QFN) GRF2I/LP-0214 Power <175mW Full Power (S2AM Module) <60mW TricklePower (1Hz) 2.7-3.3V (5V I/O capable) Voltage Processor Processor Type Processor Speeds Data Bus Ports DIGITAL CHIP PACKAGES Chip Name SiRFstarII GSP2e/LP SiRFstarII GSP2e/LP SiRFstarII GSP2e/LP Chip PN Package GSP2E/LP-7450 TQFP, 16-bit, 100 pin GSP2E/LP-7451 BGA, 16-bit, 144 pin GSP2E/LP-7460 LQFP, 32-bit, 144 pin ARM7/TDMI 6MHz, 12.5MHz, 25MHz, 49MHZ 16 Bit or 32 Bit >40 GPIO ADDITIONAL SOFTWARE OPTIONS SiRFXtrac (High Sensitivity stand alone software) SiRFLoc (High Sensitivity multimode software) Specifications above are for GSW2 WORLDWIDE SALES OFFICES SiRF California +1 (408) 467-0410 sales@sirf.com SiRF Texas Central U.S. +1 (972) 239-6988 jdaniels@sirf.com SiRF United Kingdom +44 1344 668390 aellis@sirf.com SiRF France +33 3 82 86 04 15 rocky@sirf.com SiRF Europe +49 81 529932-90 peterz@sirf.com SiRF Taiwan +886 2 2723 7853 tomlin@sirf.com For more information, contact your SiRF representative, call our sales force on +1 (408) 467-0410, or visit us at www.sirf.com. SiRF's technology is protected by U.S. and foreign patents pending and issued. SiRF and the SiRF logo are registered trademarks of SiRF Technology, Inc. SiRFstar, SiRF Powered, SnapLock, Foliage Lock, TricklePower, SingleSat, SiRFLoc, SiRFDRive, SnapStart, Push-to-Fix, SiRFNav, and SiRFXtrac are trademarks of SiRF Technology, Inc. Other trademarks are property of respective companies. February 2003 Rev. 1.1 |
Price & Availability of GRF2ILP-XXXX
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |